arrakisversion
A RISC-V simulator
A RISC-V simulator with an integrated debugger. Support full RV32IM instruction set, along with pseudo instruction and several environmental calls.
Tags | RISC-V simulator emulation RV32IM education debugger debug |
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Authors | Valeran MaytiƩ and Gurvan Debaussart |
License | CeCILL-2.1 |
Published | |
Homepage | https://gitlab.com/valoranM/arrakis |
Issue Tracker | https://gitlab.com/valoranM/arrakis/-/issues |
Maintainers | mvalo@proton.me and gurvan@debauss.art |
Available | arch != "arm32" & arch != "x86_32" |
Dependencies | |
Source [http] | https://gitlab.com/valoranM/arrakis/-/archive/1.0.0/arrakis-1.0.0.tar.gz sha256=62b276b4374f64609234b2406d00002e8c46d7bebf6bada2a703c8e8ac3bdea6 md5=1d25123c6e7cccdbd0d0b92589071023 |
Edit | https://github.com/ocaml/opam-repository/tree/master/packages/arrakis/arrakis.1.0.0/opam |
No package is dependent